UTAC Group is a leading independent provider of semiconductor assembly and testing services for a broad range of integrated circuits. The Group offers a full range of package and test development, engineering and manufacturing services and solutions to a worldwide customer.
The IC industry is always challenging for thinner packages with smaller footprint. Flip-chip packages have gained significant use in production over the years because of its high inputs/outputs (I/O), enhanced performance and small form factors. Though the flip-chip technology has various advantages over the other high-density electronic packaging approaches, there are rising challenges to ensure moldability and minimize defects with rapid advances in flip chip technology such as decreasing bump pitch, stand-off height, thinner package profiles and molded underfill (MUF) materials. The complexity was further exacerbated by the possible interactions between these factors and their impact on package yield, reliability and performance. Void entrapment challenges are faced with increasingly small gap at the bumps area under the die, resulting in significant melt front imbalance and flow resistance.
UTAC has employed Moldex3D to setup a virtual molding trial laboratory since 2009. The team has applied it to numerous packaging projects successfully. “We aim to leverage Moldex3D simulation capabilities to solve key problems faced in production.” said Ore Siew Hoon, the team leader. “Experiments involving a large DOE matrix are typically used to solve the molding issues, and is very time consuming and difficult because of the complex interactions between fluid flow, heat transfer and polymerization of encapsulant. Numerical simulation is an effective tool for analyzing the complicated physical phenomena”, added Ore Siew Hoon. Recently, the Group’s technical paper was proudly awarded the Best Paper of Session in the 44th IMAPS International Symposium on Microelectronics. The PDF file is available for reference here.