- Date：Jul 19, 2017
- Location： Fremont, CA, USA
Join us for our annual workshop held in Fremont, CA, on Wednesday, July 19, 2017, where Moldex3D experts will walk you through Moldex3D’s simulation capabilities that can address critical challenges of IC packaging, such as voids of CUF, MUF or SiP, strip warpage, wire sweep and other issues. The workshop will also feature real-world case studies, presented by companies who have successfully and practically applied Moldex3D’s simulation technologies to validate and optimize the microchips encapsulation molding process. This is a FREE event and spots are limited!
Agenda
| Time | Topic | Presenter |
| 8:30 – 9:00 AM | Registration | |
| 9:00 – 9:30 AM | Moldex3D’s Vision and R&D Plan for IC Packaging Simulation | Moldex3D |
| 9:30 – 10:00 AM | SiP Module Moldability DOE Project of iNEMI | iNEMI |
| 10:00 – 10:30 AM | Moldex3D Underfilling Simulation Technology | Moldex3D |
| 10:30 – 10:45 AM | Break | |
| 10:45 – 11:15 AM | Post Mold Cure Analysis for Strip Warpage of Flip Chip Package | Moldex3D |
| 11:15 – 12:00 AM | Moldex3D IC Packaging Demo | Moldex3D |
Location
STATS ChipPAC Inc.
46429 Landing Parkway
Fremont, CA 94538 USA
Tel: 510-979-8000
Fax: 510-979-8001
Contact
Kiki Kratzer
T: 248-946-4570 ext. 327
E: kikikratzer@us.moldex3d.com